1. Field of the Invention
Embodiments of the invention relate to gate driving circuits for series-connected power semiconductor switching devices installed in high voltage power conversion circuits.
2. Description of the Related Art
FIG. 7 shows an example of a two-level inverter circuit, which is a power conversion circuit for converting a DC power to an AC power. A DC power supply 1 has a positive terminal P and a negative terminal N. Such a DC power supply 1 can be generally composed from an AC power supply system by utilizing a rectifier and a high capacity capacitor, which are not shown in the figure.
This power conversion circuit is a three-phase inverter circuit having the upper and lower arms for the U phase, the upper and lower arms for the V phase, and the upper and lower arms for the W phase, the three pairs of upper and lower arms being connected in parallel between the P terminal and the N terminal of the DC power supply 1. A load of an AC motor 11 is connected to the U, V, and W terminals of the three-phase inverter circuit. Since each phase has the same construction, description is solely given about the U phase. The power conversion circuit of FIG. 7 uses IGTBs for semiconductor switching devices. Four series-connected IGBTs 2 through 5, each having an anti-parallel-connected diode, compose the upper arm, and four series-connected IGBTs 6 through 9, each having an anti-parallel-connected diode, compose the lower arm. Each arm comprises a plurality of semiconductor switching devices connected in series because each switching device must be secured to withstand against a high voltage of the power supply 1 that is higher than the withstand voltage of a single semiconductor switching device. The four series-connection in each arm is just an example, and an appropriate number of series connection is determined considering the voltage value of the power supply 1 and the withstand voltage of the semiconductor switching device.
A withstand voltage VCES of a semiconductor switching device used in the two-level inverter system can be determined by the rule of thumb below.Ed=VCES×n/2,where n is the number of series-connected devices in one arm and the VCES is a withstand voltage between a collector and an emitter of the semiconductor switching device.
Gate driving circuits 12 through 19 drive the respective IGBTs 2 through 9 according to the signals given from a control circuit, which is not shown in the figure. Resistors 20 through 27 are connected between the collector and emitter of the respective IGBTs 2 through 9 for the purpose of equaling the voltage to which each of IGBTs, for example IGBTs 2 through 5, connected in series is subjected in the OFF state of the IGBTs.
FIG. 8 shows an example of gate driving circuit. A gate driving signal 29 from a control circuit 28 is given to an upper arm gate driving circuit 30 and a lower arm gate driving circuit 31. An inverter gate 32 is provided in order to deliver opposite signals to the upper arm and the lower arm. Dead time circuits 33 and 34 that delay the rising up time of an ON signal are provided in order to avoid overlapping of ON periods of the upper arm IGBTGs 2 through 5 and the lower arm IGBTs 6 through 9. Photo-couplers are provided in each gate driving circuit in order to isolate a weak electric side (or a signal side) from a heavy electric side (or a power side).
FIG. 9 shows the gate driving circuit more in detail. The gate driving circuit comprises: a photo-coupler 35 to isolate the input signal, transistors 36 and 37 to amplify a signal, a base resistor 38 for the transistors 36 and 37, a gate resistor 39 to adjust the switching speed of the IGBT, and positive and negative power supplies 40 and 41 for the driving circuit.
In short-circuit fault of an IGBT in another arm in general, if a normal IGBT is turned ON, power supply short-circuit occurs as shown in FIG. 10. Whereas the explanation is made on a common two-level circuit, the situation is in principle as same as in a multilevel circuit and a circuit having a plurality of IGBTs connected in series. In this situation, the normal IGBT suffers from overcurrent and is subjected to the power supply voltage between the collector and emitter of the IGBT. In order to detect this phenomenon, as shown in FIG. 9, a diode 42 is connected to the collector of the IGBT S1. An ON command to the IGBT S1 generates current flow into the diode 42 through a resistor 43. Since the collector-emitter voltage in an ON state of the IGBT is only several volts in a normal condition, the potential at the point B is also several volts. When a short-circuit current flows, the voltage between the corrector and emitter of the IGBT S1 grows up to several hundred volts; the diode 42 turns OFF, and the potential at the point B begins to rise toward the voltage of the positive side power supply 40 of the gate driving circuit. However, the voltage is clamped by the voltage of the Zener diode 45. The Zener diode 45 turns ON and the transistor 46 in turn becomes an ON state. The potential of the gate of the IGBT S1 equals the emitter potential of the IGBT, and thus, the IGBT S1 is forcedly turned OFF.
With the turning ON of the transistor 46, a current flows in the photo-diode in the primary side of the photo-coupler 47 through the resistor 48. Thus, information of arm short-circuit is transmitted to the photo-transistor in the secondary side of the photo-coupler 47. The series-connected circuit of the resistor 43 and a capacitor 44 is a timer circuit to prevent the transistor 46 from turning ON in the process of rising up of an ON signal and turning ON of the IGBT S1 until the collector-emitter voltage drops to several volts.
Japanese Unexamined Patent Application Publication No. 2008-118728 (also referred to herein as “Patent Document 1”) discloses an example of an inverter circuit with each of upper and lower arms having series-connected IGBTs. Further, Japanese Unexamined Patent Application Publication No. 2010-288416 (in FIG. 2 in particular) discloses an example of gate driving circuit that detects a short-circuit fault of the other arm.
In a system having a plurality of series-connected IGBTs in each of the upper and lower arms as shown in FIG. 7, there are some discrepancies between switching timings of the IGBTs, thus, each IGBT does not bear the exactly equal voltage.
This inequality is usually taken into consideration in the design of dielectric strength to determine a withstand voltage and the number of series connection of IGBTs. If the design value of voltage or current is surpassed in actual operation, however, the IGBT might break down.
When one device of series connected devices is short-circuited, the other normal devices must bear the voltage, which increases the voltage that must be withstood by one device. The result is an avalanche of breakdown of the remained series-connected devices and breakdown of the entire arm finally occurs. When the entire arm, the upper arm in the example shown in FIG. 11, is broken down and short-circuited, and the other arm, the lower arm in the example, is given an ON signal, DC power supply short-circuit arises, which generates heavy short-circuit current as indicated by the broken line, causing a large scale breakdown of the converter circuit.
Patent Document 1 discloses a circuit for detecting a fault of series-connected semiconductor switching devices. This circuit however, needs a resistor for high power connected in parallel to the IGBT and in addition, requires a circuit for detecting the current through the resistor or the voltage across the resistor. Thus, the circuit may enlarge the device and raises the cost. Thus, as described above, there exists certain shortcomings in the related art.